Dr. Victor Zhirnov, Chief Scientist at the Semiconductor Research Corporation will give a seminar titled "New Chips R&D Initiative – Semiconductor Manufacturing and Advanced Research with Twins" to the interested faculty and students at Discovery Park.

Abstract

Demand for semiconductors continues to surge across sectors with the rise of artificial intelligence, cloud computing, and growing connectivity demands in other critical industries. The CHIPS and Science Act represents a historic $280 billion investment to rebuild American semiconductor manufacturing, yet success requires more than just new fabs—it demands revolutionary approaches to accelerate development cycles, reduce costs, and enhance manufacturing efficiency to compete globally.

Digital twins represent the most promising technological pathway to address these manufacturing challenges. The transformative potential of digital twins in semiconductor manufacturing extends beyond operational efficiency, encompassing broader applications such as workforce development and supply chain resilience. However, realizing this potential requires addressing fundamental challenges, including data standardization, interoperability across diverse systems, and the development of secure, scalable infrastructure that enables seamless integration from unit processes to complex system-of-systems representations—precisely the mission of the SMART USA Manufacturing Institute.

SMART USA aims to address critical gaps in semiconductor manufacturing through the development of scalable digital twin technologies. This initiative seeks to create innovative projects that advance digital twin capabilities to optimize semiconductor design, manufacturing, packaging, assembly, and testing processes. Through collaborative research, SMART USA strives to enhance U.S. semiconductor manufacturing competitiveness, reduce costs, improve yields, and develop a skilled workforce that can leverage these transformative technologies.

Bio

Victor Zhirnov is Chief Scientist at the Semiconductor Research Corporation. He is responsible for envisioning new long-term research directions in semiconductor information and communication technologies for industry and academia. His semiconductor experience spans over 30 years in the areas of materials, processes, device physics and fundamental limits. Victor served as the Chair for the Emerging Research Device Working Group for the International Technology Roadmap for Semiconductors (ITRS) and for the 2030 Decadal Plan for Semiconductors. Currently, he is Chair of the Microelectronics and Advanced Packaging Technologies Roadmap. Victor received the M.S. in applied physics from the Ural Polytechnic Institute, Yekaterinburg, Russia, and the Ph.D. in solid state electronics and microelectronics from the Institute of Physics and Technology, Moscow, in 1989 and 1992, respectively. He has authored and co-authored over 150 technical papers and contributions to books.